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 Preliminary Datasheet
RNA51953A, B
Voltage Detecting, System Resetting IC Series
Description
REJ03D0911-0402 Rev.4.02 Apr 01, 2010
RNA51953A,B are semiconductor integrated circuits designed for detecting supply voltage and resetting all types of logic circuits such as CPUs. They include a built-in delay circuit to provide the desired retardation time simply by adding an external capacitor. They fined extensive applications, including battery checking circuit, level detecting circuit and waveform shaping circuit.
Features
Few external parts Large delay time with a capacitor of small capacitance (td 100 ms, at 0.33 F) Low threshold operating voltage (Supply voltage to keep low-state at low supply voltage): 0.6 V (Typ) at RL = 22 k Wide supply voltage range: 2 V to 17 V Wide application range Ordering Information
Part Name RNA51953AFPH0 RNA51953APT0 RNA51953BFPH0 RNA51953BPT0 Package Type SOP-8 pin DIP-8 pin SOP-8 pin DIP-8 pin Package Code PRSP0008DE-C PRDP0008AF-B PRSP0008DE-C PRDP0008AF-B Package Abbreviation FP P FP P Taping Abbreviation (Quantity) H (2,500 pcs / Reel) T (1,000 pcs / Reel) H (2,500 pcs / Reel) T (1,000 pcs / Reel) Surface Treatment 0 (Ni/Pd/Au) 0 (Ni/Pd/Au) 0 (Ni/Pd/Au) 0 (Ni/Pd/Au)
Application
Reset circuit of Pch, Nch, CMOS, microcomputer, CPU and MCU, Reset of logic circuit, Battery check circuit, switching circuit back-up voltage, level detecting circuit, waveform shaping circuit, delay waveform generating circuit, DC/DC converter, over voltage protection circuit
Recommended Operating Condition
Supply voltage range: 2 V to 17 V
REJ03D0911-0402 Rev.4.02 Apr 01, 2010
Page 1 of 10
RNA51953A, B
Preliminary
Outline and Article Indication
* RNA51953A, B
Part No.
R953A YMWC CCC
SOP-8
R953B YMWC CCC
Pin No.1
Lot No. Y: Year Code (the last digit of year) M: Month Code W: Week Code C: Control Code
Trace Code
Part No.
R5 1 9 5 3A
Y MW
DIP-8
R5 1 9 5 3B
Y MW
W: Week Code M: Month Code Y: Year Code
Pin Arrangement
RNA51953A, B NC 1 NC 2 NC 3 GND 4 (Top view) NC: No Connection Outline: PRSP0008DE-C (SOP-8) PRDP0008AF-B (DIP-8) 8 NC 7 Power-supply 6 Output 5 Delay capacitor
REJ03D0911-0402 Rev.4.02 Apr 01, 2010
Page 2 of 10
RNA51953A, B
Preliminary
Block Diagram
RNA51953A, B Powersupply A: Built-in Load B: Open Collector
R1 - R2 + 1.25 V
5 A Typ -
25 A Typ
Output
GND
Delay capacitor
Operating Waveform
RNA51953A, B
Supply voltage
4.25 V 0.65 V t H
td td
Output state
L Output undefined
td 0.34 x Cd(pF) s
t
REJ03D0911-0402 Rev.4.02 Apr 01, 2010
Page 3 of 10
RNA51953A, B
Preliminary
Absolute Maximum Ratings
(Ta = 25C, unless otherwise noted)
Item Supply voltage Output sink current Output voltage Power dissipation Thermal derating Operating temperature Storage temperature Symbol VCC Isink VO Pd K Topr Tstg Ratings 18 6 VCC 18 400 570 4.4 8.3 -40 to +85 -55 to +125 Unit V mA V mW mW/C C C Conditions
Type A (output with constant current load) Type B (open collector output) 8-pin SOP (PRSP0008DE-C) 8-pin DIP (PRDP0008AF-B) 8-pin SOP (PRSP0008DE-C) Refer to the thermal derating curve. 8-pin DIP (PRDP0008AF-B)
Electrical Characteristics
(Ta = 25C, unless otherwise noted) "L" reset type
Item Detecting voltage Hysteresis voltage Detecting voltage temperature coefficient Circuit current Delay time Constant current Output saturation voltage Threshold operating voltage Output leakage current Output load current Output high voltage Symbol VS VS VS/T ICC tpd Ipd Vsat VOPL IOH IOC VOH Min 4.05 30 -- -- -- 1.6 -8 -- -- -- -- -40 VCC-0.2 Typ 4.25 50 0.01 450 420 3.4 -5 0.2 0.67 0.55 -- -25 VCC-0.06 Max 4.45 80 -- 680 630 7.0 -3 0.4 0.8 0.7 30 -17 -- Unit V mV %/C A ms A V V nA A V Test Conditions
Type A, VCC = 5V Type B, VCC = 5V
Cd = 0.01F * VCC = 5V VCC = 4V, Isink = 4mA RL = 2.2k, Vsat 0.4V RL = 100k, Vsat 0.4V
Type B Type A, VCC = 5V, VO = 1/2 VCC Type A
Note:
Please set the desired delay time by attaching capacitor of the range between 4700 pF and 10 F.
REJ03D0911-0402 Rev.4.02 Apr 01, 2010
Page 4 of 10
RNA51953A, B
Preliminary
Typical Characteristics
Thermal Derating 600
Power Dissipation Pd (mW) Detection Voltage VS (V)
Detection Voltage vs. Ambient Temperature 4.34 4.32 4.30 4.28 4.26
VSL VSH
500 400 300 200 100 0 0
8-pin DIP (PRDP0008AF-B)
8-pin SOP (PRSP0008DE-C)
4.24 4.22 -40 -20
25
50
75 85 100
125
0
20
40
60
80 100
Ambient Temperature Ta (C)
Ambient Temperature Ta (C)
Delay Capacitance vs. Delay Time
Delay Capacitance Cd (F)
10 7V CC = 5 V 5 3 1 7 5 3 0.1 7 5 3 0.01 7 5 3 0.001 0.1 3 57 1 3 5 7 10 3 5 7 100 3 5 7 1000
Delay Time vs. Ambient Temperature 6
CD = 0.01 F
Delay Time tpd (ms)
5 4
VCC = 5 V
3 2 1 0 -40 -20
10 V VCC = 15 V
0
20
40
60
80 100
Delay Time tpd (ms)
Ambient Temperature Ta (C)
Canstant Current at Cd pin Ipd (A)
Canstant Current at Cd pin vs. Ambient Temperature -12 -10 -8 -6 -4 -2 0 -40 -20
Output Voltage VOUT (V)
VCC = 5 V VCC = 15 V
Threshold Operating Voltage 1.0 0.8 0.6
RL = 2.2 k Ta = 25C
0.4 0.2 0 0
RL = 22 k RL = 100 k
0
20
40
60
80 100
0.2
0.4
0.6
0.8
1.0
Ambient Temperature Ta (C)
Supply Voltage VCC (V)
REJ03D0911-0402 Rev.4.02 Apr 01, 2010
Page 5 of 10
RNA51953A, B
Preliminary
Output Load Current vs. Output Voltage (RNA51953A)
Output Load Current ICC (A)
Output Saturation Voltage vs. Output Sink Current
Output Saturation Voltage Vsat (V)
0.3
VCC = 4 V
-40
0.2
-30
VCC = 5 V VCC = 10 V VCC = 15 V
-20
0.1
-10
0 0
1
2
3
4
5
6
0 0
4
8
12
16
Output Sink Current Isink (mA) Circuit Current vs. Ambient Temperature (RNA51953B) 700
Circuit Current ICC (A)
Output Voltage VO (V)
600 500 400 300 200 100 0 -40 -20 0 20 40 60 80 100
VCC = 5 V
Ambient Temperature Ta (C)
REJ03D0911-0402 Rev.4.02 Apr 01, 2010
Page 6 of 10
RNA51953A, B
Preliminary
Example of Application Circuit
Reset Circuit of RNA51953
VCC
Powersupply Output RNA51953x GND
RL
Powersupply RESET Logic circuit GND
Delay capacitor Cd
Figure 1 Reset Circuit of RNA51953 Notes: 1. When the voltage is anything except 4.25 V, RNA51957 and RNA51958 are used. In this case, the detecting supply voltage is 1.25 (R1 +R2)/R2 (V) approximately. The detecting supply voltage can be set between 2 V and 15 V. 2. The delay time is about 0.34 Cd (pF) s. 3. If the RNA51953 and the logic circuit share a common power source, type A (built-in load type) can be used whether a pull-up resistor is included in the logic circuit or not. 4. The logic circuit preferably should not have a pull-down resistor, but if one is present, add load resistor RL to overcome the pull-down resistor. 5. When the reset terminal in the logic circuit is of the low reset type, RNA51953 and RNA51957 are used and when the terminal is of the high reset type, RNA51958 are used. 6. When a negative supply voltage is used, the supply voltage side of RNA51953 and the GND side are connected to negative supply voltage respectively. Case of Using Reset Signal except Supply Voltage in the RNA51953
(a) Reset at ON Powersupply RNA51953x GND Delay capacitor Cd Control signal Powersupply RESET Logic circuit GND VCC (b) Reset at transistor ON Powersupply RNA51953x GND Delay capacitor Cd Powersupply RESET Logic circuit GND VCC
Out put
RL
Out put
RL
Figure 2 Case of Using Reset Signal except Supply Voltage in the RNA51953
REJ03D0911-0402 Rev.4.02 Apr 01, 2010
Page 7 of 10
RNA51953A, B
Preliminary
Notice for use
About the Power Supply Line 1. About bypass capacitor Because the ripple and the spike of the high frequency noise and the low frequency are superimposed to the power supply line, it is necessary to remove these. Therefore, please install C1 and C2 for the low frequency and for the high frequency between the power supply line and the GND line as shown in following figure 3.
VCC
+
C1
C2
Power-supply Output RNA51953 GND Delay capacitor Cd
Example of ripple noise measures
Figure 3 Example of Ripple Noise Measures
Setting of Delay Capacity Please use capacitor Cd for the delay within the range of 10 F or less. When a value that is bigger than this is set, the problem such as following (1), (2), and (3) becomes remarkable.
t
VCC Output
tpd
tPHL
Figure 4 Time Chart at Momentary Voltage-Decrease (1) The difference at delay time becomes remarkable. A long delay setting of tens of seconds is fundamentally possible. However, when set delay time is lengthened, the range of the difference relatively grows, too. When a set value is assumed to be `tpd', the difference occurs in the range from 0.47 tpd to 2.05 tpd. For instance, 34 seconds can be calculated at 100 F. However, it is likely to vary within the ranges of 16-70 seconds. (2) Difficulty to react to a momentary voltage decrease. For example, the reaction time tPHL is 10 s when delay capacitor Cd = 0.1 F. The momentary voltage-decrease that is longer than such tPHL are occurs, the detection becomes possible. When the delay capacitance is enlarged, tPHL also becomes long. For instance, it becomes about 100 to 200 s in case of circuit constant C1 = 100 F. (Characteristic graph 1 is used and extrapolation in case of Cd = 100 F.) Therefore, it doesn't react to momentary voltage-decrease that is shorter than this. (3) Original delay time is not obtained. When the momentary voltage-decrease time `t' is equivalent to tPHL, the discharge becomes insufficient and the charge starts at that state. This phenomenon occurs at large capacitance. And, original delay time tpd is not obtained. Please refer to characteristic graph 2. (Delay time versus input pulse width)
REJ03D0911-0402 Rev.4.02 Apr 01, 2010
Page 8 of 10
RNA51953A, B
Characteristic Graph 1 Reaction Time vs. Delay Capacitance (Example data) 1000
Preliminary
Characteristic Graph 2 Delay Time vs. Momentary Voltage Decrease Pulse Width (Example data) 10000
Delay Capacitance 0.01 F 0.033 F 0.1 F 0.33 F 1 F 2.2 F 3.3 F
Reaction Time tPHL (s)
200 100
Delay Time tpd (ms)
1000
100
10
10
1 0.01
0.1 1 10 Delay Capacitance Cd (F)
100
1 1
10
100 1000 Pulse Width (s)
10000
Figure 5 Characteristic Graph
Setting of Output Load Resistance (RNA51953B) High level output voltage can be set without depending on the power-supply voltage because the output terminal is an open collector type. However, please guard the following notes. 1. Please set it in value (2 V to 17 V) within the range of the power-supply voltage recommendation. Moreover, please never impress the voltage of maximum ratings 18 V or more even momentarily either. 2. Please set output load resistance (pull-up resistance) RL so that the output current (output inflow current IL) at L level may become 4 mA or less. Moreover, please never exceed absolute maximum rating (6 mA).
VCC (2 V to 17 V) RL 6 IL 4 mA
Figure 6 Output Load Resistance RL
Others 1. Notes when IC is handled are published in our reliability handbook, and please refer it. The reliability handbook can be downloaded from our homepage (following URL). http://www.renesas.com/products/common_info/reliability/reliability_root.jsp 2. Additionally, please inquire of our company when there is an uncertain point on use.
REJ03D0911-0402 Rev.4.02 Apr 01, 2010
Page 9 of 10
RNA51953A, B
Preliminary
Package Dimensions
JEITA Package Code P-SOP8-4.4x4.85-1.27 RENESAS Code PRSP0008DE-C Previous Code -- MASS[Typ.] 0.1g
*1
D
F
8
5
NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET.
bp
HE E
*2
Index mark
Terminal cross section ( Ni/Pd/Au plating )
1 Z e 4
*3
c
Reference Dimension in Millimeters Symbol
bp
x
M L1
A1
L
y
Detail F
D E A2 A1 A bp b1 c c1 HE e x y Z L L1
A
A2
Min Nom Max 4.65 4.85 5.05 4.2 4.4 4.6 1.85 0.00 0.1 0.20 2.03 0.34 0.4 0.46
0.15 0.20 0.25 0 8 5.7 6.2 6.5 1.12 1.27 1.42 0.12 0.10 0.75 0.25 0.45 0.65 0.90
JEITA Package Code P-DIP8-6.3x9.6-2.54
RENESAS Code PRDP0008AF-B
Previous Code DP-8FV
MASS[Typ.] 0.54g
D
8
5
1 0.89 b3
4
Z
A
E
Reference Dimension in Millimeters Symbol
A1
Min
e
bp
e1
c
( Ni/Pd/Au plating )
e1 D E A A1 bp b3 c e Z L
Nom Max 7.62 9.60 10.6 6.30 7.4 5.06
L
0.5 0.40 0.48 0.56 1.30 0.19 0.25 0.31 15 0 2.29 2.54 2.79 1.27 2.54
REJ03D0911-0402 Rev.4.02 Apr 01, 2010
Page 10 of 10
Notice
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